Integrated semiconductor diode arrangement and integrated semiconductor component

ABSTRACT

An integrated semiconductor diode arrangement is provided. The arrangement includes an anode region and a cathode region that are formed in a semiconductor material region. The anode region has an arrangement of alternately occurring and directly adjacent first and second anode zones, which alternate in their conductivity type. The anode region furthermore has a first particular anode zone of the second conductivity type, the lateral extent of which is comparatively larger than that of the further anode zones of the same conductivity type.

CROSS-REFERENCE TO RELATED APPLICATIONS

This Utility Patent Application claims priority to German PatentApplication No. DE 10 2004 004 862.2, filed on Jan. 30, 2004, which isincorporated herein by reference.

BACKGROUND

The invention relates to an integrated semiconductor diode arrangementand to an integrated semiconductor component using the integratedsemiconductor diode arrangement according to the invention.

In many technical devices, and precisely in the field of controllingpower circuits, protection structures prevent the electronic circuitsfrom being loaded by electrostatic discharges, namely so-called ESDloads. For this purpose, high-voltage diodes are used as freewheelingdiodes, for example. In this case it is often necessary to implementadditional measures in order to protect these protection elementsthemselves and/or in order to be able to integrate the protectionelements and the production thereof in existing production concepts andstructures.

For this and other reasons, there is a need for the present invention.

SUMMARY

The present invention is an integrated semiconductor diode arrangement.The arrangement includes an anode region and a cathode region that areformed in a semiconductor material region. The anode region has anarrangement of alternately occurring and directly adjacent first andsecond anode zones, which alternate in their conductivity type. Theanode region furthermore has a first particular anode zone of the secondconductivity type, the lateral extent of which is comparatively largerthan that of the further anode zones of the same conductivity type.

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings are included to provide a furtherunderstanding of the present invention and are incorporated in andconstitute a part of this specification. The drawings illustrate theembodiments of the present invention and together with the descriptionserve to explain the principles of the invention. Other embodiments ofthe present invention and many of the intended advantages of the presentinvention will be readily appreciated as they become better understoodby reference to the following detailed description. The elements of thedrawings are not necessarily to scale relative to each other. Likereference numerals designate corresponding similar parts.

FIGS. 1A and 1B illustrate lateral cross-sectional views of alternativeembodiments of the integrated semiconductor diode arrangement accordingto the invention.

FIG. 2 illustrates a lateral cross-sectional view of an integratedsemiconductor diode arrangement from the prior art.

FIGS. 3A-F illustrate schematic plan views of anode regions ofalternative embodiments of the integrated semiconductor diodearrangement according to the invention.

FIGS. 4A-D illustrate plan views of anode regions of alternativeembodiments of the integrated semiconductor diode arrangement.

FIGS. 5-6 illustrate circuit diagrams of exemplary fields of applicationof the integrated semiconductor diode arrangement according to thealternative invention.

DETAILED DESCRIPTION

In the following Detailed Description, reference is made to theaccompanying drawings, which form a part hereof, and in which is shownby way of illustration specific embodiments in which the invention maybe practiced. In this regard, directional terminology, such as “top,”“bottom,” “front,” “back,” “leading,” “trailing,” etc., is used withreference to the orientation of the Figure(s) being described. Becausecomponents of embodiments of the present invention can be positioned ina number of different orientations, the directional terminology is usedfor purposes of illustration and is in no way limiting. It is to beunderstood that other embodiments may be utilized and structural orlogical changes may be made without departing from the scope of thepresent invention. The following detailed description, therefore, is notto be taken in a limiting sense, and the scope of the present inventionis defined by the appended claims.

One embodiment of the invention provides an integrated semiconductordiode arrangement that can be integrated or can be formed in integratedfashion in existing production technologies, for example of the BCD(Bipolar CMOS DMOS) type, with a low outlay and with robust ESDprotection properties.

The integrated semiconductor diode arrangement according to oneembodiment of the invention has an anode region essentially of a firstconduction type or first conductivity type. Furthermore, a cathoderegion of a second conduction type or conductivity type different fromthe first conduction type or conductivity type is provided. The anoderegion and the cathode region are formed in a semiconductor materialregion and are arranged in a first extension direction. In one case, theanode region is provided at the very top. According to one embodiment ofthe invention, the anode region has an arrangement in at least onesecond extension direction, for example in a cross section, ofalternately occurring first and second anode zones of the firstconduction type or first conductivity type and of the second conductiontype or second conductivity type, respectively, which are directlyadjacent to one another. The anode region has, as part of thearrangement of the anode zones, a first particular anode zone of thesecond conduction type or of the second conductivity type. Said zone hasa comparatively larger, in particular lateral extent than the furtheranode zones of the anode region of the same conduction type or the sameconductivity type. Moreover, said first particular anode zone isprovided, arranged and/or formed in such a way that it serves, during anoperating mode with electrostatic or ESD loading, as an emitter regionof an npn-transistor formed in parasitic fashion in the integrated diodearrangement.

In this way, the anode region and, in particular, the arrangement of theanode zones have a first particular anode zone of the second conductiontype or of the second conductivity type. Said zone is provided, arrangedand/or formed in such a way that it serves as an emitter region of thebipolar transistor or npn-transistor formed in parasitic fashion in thecase of ESD loading.

It thus becomes possible, in one embodiment, for an integratedsemiconductor diode arrangement with a robust ESD protection structureto be provided in a manner integrated in particular technologies.

In one embodiment, second particular anode zone of the first conductiontype or of the first conductivity type is provided, arranged and/orformed adjacent to the first particular anode zone. In this way, itserves as a base region or as a base terminal region of the bipolartransistor, for example npn-transistor, formed in parasitic fashion inthe integrated diode arrangement. Thus, in the case of this embodiment,a second particular anode zone of the first conduction type or of thefirst conductivity type is provided, adjacent to the first particularanode zone. Said second particular anode zone is provided, arrangedand/or formed in such a way that it serves as a base region or a baseterminal region of the npn-transistor formed in parasitic fashion in theintegrated diode arrangement.

In addition or as an alternative, additional zones of the firstconduction type or of the first conductivity type may be provided,arranged and/or formed below the anode zones of the arrangement of theanode region and also below the second particular anode zone in such away that a comparatively low base bulk resistance of the npn-transistorformed in parasitic fashion in the integrated diode arrangement can beset or is set by means of said zones.

As an additional or alternative measure, in the case of this example,additional zones of the first conduction type or of the firstconductivity type are provided, arranged and/or formed below the anodezones of the arrangement of anode zones and also below the secondparticular anode zone in such a way that they bring about the formationof a comparatively low base bulk resistance of the npn-transistor formedin parasitic fashion in the integrated semiconductor diode arrangement.

In accordance with another embodiment of the integrated semiconductordiode arrangement according to the invention, it is provided that theformation of the comparatively low base resistance has been or isachieved in particular by virtue of the fact that the dopantconcentration of the additional zones of the first conduction type or ofthe first conductivity type is chosen to be higher than the dopantconcentration in an embedding well zone provided, which accommodates thefurther anode zones of the anode region.

In another refinement of the integrated semiconductor diode arrangementaccording to the invention, it is provided that the first particularanode zone has a lateral extent which is at least approximately twice aslarge as the lateral extent of the further anode zones of the anoderegion.

With regard to the geometrical arrangements of anode region and cathoderegion, various possibilities result by way of the correspondingselection possibilities with regard to the first and second extensiondirections.

In accordance with another embodiment, it is provided that the firstextension direction is a lateral extension direction, for example withrespect to the semiconductor material region in which the integratedsemiconductor diode arrangement is formed, or with respect to a surfaceregion thereof. As an alternative, the first extension direction mayalso be a correspondingly vertically chosen extension direction.

In another additional or alternative embodiment of the integratedsemiconductor diode arrangement, it is provided that the secondextension direction is a lateral extension direction, with respect tothe semiconductor material region in which the integrated semiconductordiode arrangement is formed, or with respect to a surface regionthereof. In this case, too, a vertical orientation of the secondextension direction is formed as an alternative.

In one embodiment, in the structure of the integrated semiconductordiode arrangement, the first extension direction and the secondextension direction are identical and are oriented laterally, so thatthe anode region and the cathode region are formed adjacent to oneanother and next to one another laterally.

In one embodiment of the integrated semiconductor diode arrangementaccording to the invention, it is provided that the arrangement of theanode zones has an alternating sequence of three to ten anode zones.

In accordance with another embodiment of the integrated semiconductordiode arrangement, the anode zones are formed such that they areessentially concentric in relation to one another, in particular withrespect to their respective basic area and/or with respect to the secondextension direction.

In one embodiment, the first particular anode zone of the secondconduction type or of the second conductivity type is formed as acentral or centrally located zone with respect to the arrangement of theanode zones.

As an alternative to this, as the first particular anode zone of thesecond conduction type or of the second conductivity type is formed, aperipheral or peripherally located zone is formed with respect to thearrangement of the anode zones.

Various embodiments are appropriate with regard to the shaping of thefirst and second anode zones and the particular anode zones, whichembodiments can also be combined with one another.

In one embodiment of the integrated semiconductor diode arrangementaccording to the invention, it is provided that each of the first andsecond anode zones and/or each of the first and second particular anodezones in each case has a basic area in the form of a circle, an ellipseor a rectangle, for example in the second extension direction.

The conduction types or conductivity types may also be selected andcombined with one another in various ways.

In accordance with another embodiment, it is provided that the firstconduction type or first conductivity type is a p-type, and that thesecond conduction type or second conductivity type is an n-type.

As an alternative to this, it is provided that the first conduction typeor first conductivity type is an n-type, and that the second conductiontype or second conductivity type is a p-type.

It is thus possible to mutually interchange the first and secondconduction types or conductivity types with regard to the n-type and thep-type. In accordance with this interchanging, the anode region andcathode region are then also interchanged in comparison with thestructures illustrated in FIGS. 1A and 1B. Furthermore, in thecorresponding embodiments formed by interchanging, a pnp-transistor isthen also formed as a bipolar transistor in parasitic fashion.

Another embodiment of the present invention provides an integratedsemiconductor component, in particular in a so-called BCD technology, inwhich an integrated semiconductor diode arrangement according to theinvention is provided.

FIG. 1B illustrates one embodiment of an integrated semiconductor diodearrangement 10 according to the invention, which is used in anintegrated semiconductor component 100 according to the invention.

The semiconductor diode arrangement 10 according to one embodiment ofthe invention is formed in a semiconductor material region 20 having anessentially planar surface region 20 a. In the embodiment illustrated inFIG. 1, said semiconductor material region 20 is formed by a p-typesubstrate 20 p in which various doping zones are formed. These dopingzones are, on the one hand, n⁻-doped epitaxial zones 21. Furthermore, ap-doped well zone 25 is formed for the anode region 12, A. This p-dopedwell region 25 reaches as far as the surface region 20 a of thesemiconductor material region 20. At the surface 20 a, the well region25 is formed by the arrangement 11 of the first and second anode zones12 p and 12 n and also the first and second particular anode zones 12 eand 12 b, respectively.

The first anode zones 12 n are n⁺-doped. The second anode zones 12 p arep⁺-doped. The first particular anode zone 12 e is likewise n⁺-dopedwhereas the second particular anode zone 12 b is p⁺-doped.

A cathode region 14, K is formed adjacent to the anode region 12, A, andis functionally essentially formed by the n-doped zones 21, 22 and 23.As has already been explained in part above, the cathode or the cathoderegion 14, K may be interpreted as a functional unit of the interactingzones 21, 22 and 23. The zone 21 may also be interpreted as an n⁻-dopedepitaxial layer 21. The base line region 22 already mentioned above,with its n⁺-type doping, may also be referred to as a buried layer 21 ofthe n⁺-type. Finally, the zone 23 is likewise n⁺-doped, also contributesto the mode of operation of the cathode 14, K, but is ultimately a zone14 a, Ka for contact-connection of the cathode region 14, K.

In this way, on account of the interaction of the zones 21, 22 and 23and on account of their geometrical arrangement in relation to oneanother and in relation to the anode region 12, A, the anode region 12,A and the cathode region 14, K are arranged laterally and verticallywith respect to one another, so that two first extension directions Z1and Z2, namely laterally in the underlying semiconductor substrate 20and vertically with respect thereto, are present.

The base line region 22 with n⁺-type doping is provided below the anoderegion 12, A and spaced apart from the latter by the n⁻-doped epitaxiallayer 21, said base line region being connected to the cathode region14, K. The p-type substrate 20 p is connected, via p-doped zones 24 thatare further provided, to a field plate structure for field shieldingthat reaches as far as the surface region 20 a of the semiconductormaterial region 20.

On the one hand, the illustrated embodiment involves the presence of thefirst particular anode zone 12 e of the second conduction type orconductivity type, that is, n-type doping. On the other hand, theillustrated embodiment involves the presence of a further particularanode zone 12 b of the first conduction type or first conductivity type,that is, p-type doping.

During operation, in the event of ESD loading, the first particularanode zone 12 e acts as an emitter region E for the npn-transistor Pformed in parasitic fashion, whereas in this mode the further particularanode zone 12 b serves as a corresponding base region B or base terminalregion BA of the npn-transistor P formed in parasitic fashion.

In one embodiment, provision is made of the additional zones 12 z 1 and12 z 2 of the first conduction type or conductivity type, that is,p-type doping, which are formed below the first and second anode zones12 n and 12 p and below the second particular anode zone 12 b.

The anode zones 12 n, 12 p, 12 e and also 12 b are arranged in a givenextension direction X, that is, in the second extension direction, whichis identical to the extension direction Z for the arrangement from anoderegion 12, A to cathode region 14, K, the latter corresponding to thefirst extension direction Z.

The embodiment illustrated in FIG. 1B has, besides the first particularand additional anode zone 12 e, a further second and additionalparticular anode zone 12 b and additional zones 12 z 1, 12 z 2 of thefirst conduction type p that are correspondingly provided in the lowerregion. The embodiment illustrated in FIG. 1A constitutes an alternativeversion of the integrated semiconductor diode arrangement 10 accordingto the invention. In this case, in accordance with one embodiment of thepresent invention, the second particular anode zone 12 b and also thefurther zones of the first conduction type, namely with p-type doping,which are provided below the anode region 12 a are not provided, so thatthe base line resistance R1 of the parasitic bipolar transistor P isformed in the path from the first additional anode zone 12 e of thesecond conductivity type n to the directly adjacent, that is, preceding,anode zone 12 p with p⁺-type doping. However, functioning isnevertheless ensured thereby.

FIG. 2 illustrates a conventional integrated semiconductor diodearrangement 10′ provided in a customary integrated semiconductorcomponent 100′. Although a corresponding arrangement 11 of anode zones12 n and 12 p for the anode region 12, A is also discernable here, thereare absent here firstly the first particular anode zone 12 e and thesecond particular anode zone 12 b and moreover also the plurality ofzones 1271, 1272 of the first conduction type or conductivity type, thatis, zones with a p-type doping, below the arrangement 11.

FIGS. 3A to 3F illustrate schematic plan views of various arrangements11 for anode zones 12 n, 12 p, 12 e, 12 b for the anode region 12, A ofalternative embodiments of the integrated semiconductor diodearrangement 10 according to the invention.

In these embodiments, all first, second and particular anode zones 12 n,12 p, 12 e and 12 b are formed as dopant zones that are concentric inrelation to one another with respect to their basic area. In this caseall the anode zones 12 n, 12 p, 12 e and 12 b are formed approximatelycircularly. The extension direction X for the sequence of thearrangement 11 of the anode zones 12 n, 12 p, 12 e, 12 b is in each casea radial direction here. The anode zones 12 n, 12 p, 12 e, 12 b areformed alternately with the dopings p⁺ and n⁺. In the case of theembodiments of FIGS. 3A, 3B and 3E, the first and second particularanode zones 12 e and 12 b are located peripherally, that is, as seenfrom the center of the arrangement 11, on the outer side. In the case ofthe embodiments of FIGS. 3C, 3D and 3F, by contrast, the first andsecond particular anode zones 12 e and 12 b are formed as centrallylocated doping zones. In the case of the embodiments of FIGS. 3E and 3F,in addition to the extension direction X for the alternating sequence ofthe arrangement 11 of the anode zones 12 n, 12 p, 12 e, 12 b there isadditionally an azimuthal or angular direction φ for the inner orcentrally located anode zones 12 n, 12 p and respectively for the anodezones 12 n, 12 p located on the outer side.

The embodiments of FIGS. 4A to 4D also exhibit concentric sequences forthe arrangement 11 of the anode zones 12 n, 12 p, 12 e, 12 b, but herethe anode zones 12 n, 12 p, 12 e, 12 b have a rectangular basic area inthe lateral extension direction X. The first and second particular anodezones 12 e and 12 b are located peripherally in the case of theembodiments of FIGS. 4A and 4B whereas they are located centrally in thecase of the embodiments of FIGS. 4C and 4D.

Various problem areas may be solved by various embodiments of theinvention. Some problems are solved by the provision of the high-voltagediode or freewheeling diode according to various embodiments of theinvention as a robust ESD structure, for example in BCD technology.

For example, polarity reversal protection of circuits requires a diodewhich, on the one hand, is ESD-resistant or ESD-protectable and, on theother hand, does not inject into the substrate in the case of negativevoltages at the anode (see FIG. 5).

In the case of low-side switches with an inductive load, a diode as afreewheeling diode is inserted between two external pins (see FIG. 6).

When the output transistor is turned off, the freewheeling diode opens acurrent path for the decay of the current through the inductance. Thus,the high-voltage diode according to one embodiment of the invention haslower gain of the pnp-transistor in the substrate as a result of anadditional npn-transistor. Since the freewheeling diode is connectedbetween two external pins in parallel with the load, it must eitheritself be robust in order to withstand an ESD loading of VCC to EXC orbe able to be protected by means of an ESD structure.

One embodiment of the invention describes an ESD structure in the formof a high-voltage diode with a low substrate current and short reverserecovery time. An external ESD protection or complicated guard ringconstructions are thus invalid.

One embodiment of the invention provides the combination of an ESD diodewith a high-voltage diode having a low substrate current with a shortreverse recovery time in such a way that the ESD robustness and thediode behavior are preserved. In comparison with the construction of thehigh-voltage diode having a low substrate current with a short reverserecovery time (cf. FIG. 2), the new ESD-robust high-voltage diodediffers in several ways. Besides the alternating arrangement ofp⁺/n⁺-type zones in the anode zone there is a larger n-type zone whichacts as an emitter of the parasitic npn-transistor in the event of ESDloading. Also, below the n⁺/p⁺-type zones in the anode zone and alsobelow the optional additional p⁺-type base terminal besides the largern-type zone there are optionally additional p-type zones, which lead tothe lowering of the base bulk resistance of the parasitic bipolartransistor, in particular npn-transistor. This ensures that the bipolartransistor, in particular npn-transistor with the larger n-type zone asemitter triggers first in the ESD case and accepts the current.

It is possible to generate electrothermally simulated 2 D current, fieldand temperature distributions of an ESD-robust high-voltage diode, forexample, during a current ramp of 10 mA/μm in 5 ns. This current rampreproduces the conditions of an ESD discharge. Current is transportedvia the parasitic npn-transistor with the larger n-type zone as emitter.After current loading of 100 ns, the result is an increase in themaximum temperature on account of the thermal loading as a result of thecurrent pulse, but no movement of the current distribution in edgeregions, which generally leads to the destruction of the component.

Although specific embodiments have been illustrated and describedherein, it will be appreciated by those of ordinary skill in the artthat a variety of alternate and/or equivalent implementations may besubstituted for the specific embodiments shown and described withoutdeparting from the scope of the present invention. This application isintended to cover any adaptations or variations of the specificembodiments discussed herein. Therefore, it is intended that thisinvention be limited only by the claims and the equivalents thereof.

1. An integrated semiconductor diode arrangement comprising: an anoderegion of a first conductivity type; a cathode region of a secondconductivity type different from the first conductivity type; whereinthe anode region and the cathode region are formed in a semiconductormaterial region and are arranged in a first extension direction; theanode region further comprising an arrangement in a second and lateralextension direction in a cross section of alternately occurring firstand second anode zones of the first conductivity type and of the secondconductivity type, respectively, which are directly adjacent to oneanother; and the anode region further comprising as part of thearrangement of the anode zones a first particular anode zone of thesecond conductivity type, which has a comparatively larger lateralextent than the further anode zones of the anode region of the sameconductivity type.
 2. The integrated semiconductor diode arrangement ofclaim 1, wherein during operating mode with ESD loading, the firstparticular anode zone serves as an emitter region of a bipolartransistor formed in parasite fashion in the integrated diodearrangement.
 3. The integrated semiconductor diode arrangement of claim2, wherein the alternately occurring first and second anode zones of theanode region that are directly adjacent to one another areshort-circuited.
 4. The integrated semiconductor diode arrangement ofclaim 3, further comprising a second particular anode zone of the anoderegion and of the arrangement of the first conductivity type adjacent tothe first particular anode zone in such a way that it serves as a baseregion of the bipolar transistor formed in parasitic fashion in theintegrated diode arrangement.
 5. The integrated semiconductor diodearrangement of claim 4, further comprising: additional zones of thefirst conductivity type provided below the anode zones of thearrangement of the anode region and provided below the second particularanode zone such that a comparatively low base resistance of the bipolartransistor formed in parasitic fashion in the integrated diodearrangement can be set by means of said zones.
 6. The integratedsemiconductor diode arrangement of claim 5, wherein the dopantconcentration of the additional zones of the first conductivity type ischosen to be higher than the dopant concentration in an embedding wellzone provided, which accommodates the further anode zones of the anoderegion.
 7. The integrated semiconductor diode arrangement of claim 6,wherein the first particular anode zone has a lateral extent that is atleast twice as large as the lateral extent of the further anode zones ofthe anode region.
 8. The integrated semiconductor diode arrangement ofclaim 7, wherein the first extension direction is a lateral extensiondirection, in particular with respect to a surface region of thesemiconductor material region in which the integrated semiconductordiode arrangement is formed.
 9. The integrated semiconductor diodearrangement of claim 7, wherein the first extension direction is avertical extension direction, in particular with respect to a surfaceregion of the semiconductor material region in which the integratedsemiconductor diode arrangement is formed.
 10. The integratedsemiconductor diode arrangement of claim 7, wherein the second extensiondirection is a lateral extension direction, in particular with respectto the semiconductor material region in which the integratedsemiconductor diode arrangement is formed.
 11. The integratedsemiconductor diode arrangement of claim 7, wherein the second extensiondirection is a vertical extension direction, in particular with respectto the semiconductor material region in which the integratedsemiconductor diode arrangement is formed.
 12. The integratedsemiconductor diode arrangement of claim 1, wherein the arrangement ofthe anode zones has an alternating sequence of three to ten anode zones.13. The integrated semiconductor diode arrangement of claim 1, whereinthe anode zones are formed such that they are essentially concentric inrelation to one another, with respect to their respective basic area andwith respect to the second extension direction.
 14. The integratedsemiconductor diode arrangement of claim 1, wherein the first particularanode zone of the second conductivity type is formed as a centrallylocated zone with respect to the arrangement of the anode zones.
 15. Theintegrated semiconductor diode arrangement of claim 1, wherein the firstparticular anode zone of the second conductivity type is formed as aperipherally located zone with respect to the arrangement of the anodezones.
 16. The integrated semiconductor diode arrangement of claim 1,wherein each of the first and second anode zones and each of the firstand second particular anode zones have a basic area in the form of acircle in the second extension direction.
 17. The integratedsemiconductor diode arrangement of claim 1, wherein each of the firstand second anode zones and each of the first and second particular anodezones have a basic area in the form of a rectangle in the secondextension direction.
 18. The integrated semiconductor diode arrangementof claim 1, wherein the first conductivity type is a p-type, and thesecond conductivity type is an n-type.
 19. The integrated semiconductordiode arrangement of claim 1, wherein the first conductivity type is ann-type, and the second conductivity type is a p-type.
 20. An integratedsemiconductor component of BCD technology comprising: an anode regionhaving a first conductivity type; a cathode region having a secondconductivity type that is different from the first conductivity type;wherein the anode and cathode regions are formed in a semiconductorregion and extend in a first direction; an arrangement in the anoderegion extending in a second direction, of alternately occurring firstand second anode zones of the first conductivity type and of the secondconductivity type, respectively; and a first particular anode zone ofthe second conductivity type within the arrangement, the firstparticular anode zone having a comparatively larger area extending inthe second direction than the second anode zones.
 21. An integratedsemiconductor component comprising: an anode region of a firstconductivity type; a cathode region of a second conductivity type, thatis different from the first conductivity type wherein the anode andcathode regions are formed in a semiconductor region and extend in afirst direction; first anode zones of a first conductivity type in theanode region; second anode zone of a second conductivity type in theanode region, wherein the first and second anode zones collectively forman arrangement extending in a second direction; means within thearrangement for serving as an emitter region of a bipolar transistorformed in parasitic fashion in the integrated semiconductor component.